CRiSP – Advanced VHDL, Verilog Editor
CRiSP is tailored for VHDL and Verilog design of FPGA’s or ASICS. CRiSP Verilog editor provides Verilog (IEEE-1364)and VHDL language specific features. It helps coding and debugging in hardware development based on Verilog or VHD.
CRiSP has advanced support for VHDL editing. It has support for Color highlighting of VHDL source code to facilitate reading and automatic identifier completion to reduce typing. CRiSP also builtin support for CRTAGS for VHDL meaning that the class browser and code completion works seamlessly for VHDL editing.
Extensive templates for all functions allows the user to code without remembering complex syntax and parameters of the VHD language. Console view show output messages from external compiler and error messages from internal code parser. It make you easy to fix problems.